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Virtual Open Systems Scientific Publications

FPGA virtualization with accelerators overcommitment for Network Function Virtualization

FPGA virtualization with accelerators overcommitment for Network Function Virtualization


2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig'17), Cancun, Mexico.

International Conference on ReConFigurable Computing and FPGAs - ReConFig-2017

Contributed slides presentation

The slides presented at this conference are made publicly available.


vFPGAmanager, FPGA accelerators, FPGA virtualization, Network function virtualization, dynamic partial reconfiguration.


M.Paolino, S.Pinneterre, D.Raho.


This research work has been supported by the European Horizon H2020 research and innovation program, SESAME, under grant agreement number 671596. The work presented in this paper reflects only authors' view and the European Commission is not responsible for any use that may be made of the information it contains.


Network Functions Virtualization (NFV) is revolutionizing the telecom operators data centers as well as the way in which virtualization is applied to high performance/high availability scenarios. Hardware accelerators, and in particular FPGAs, are a very promising solution for NFV, both for their high performance, predictability, programmability and reconfigurability.

Recently, consolidation is brought to its limit in this field with lightweight virtualization techniques, which require a high overcommitment of FPGA accelerator resources in order to cope with the needs of thousands of guests. The lack of such virtualization support, together with cloud integration and programmability issues, limits the deployment of FPGAs in NFV.

This paper presents the FPGA Virtualization Manager (vFPGAmanager), an FPGA IP block which enables accelerators overcommitment with direct guest access. This is a key feature to enable the acceleration of thousands of guests, as it is the case for lightweight VMs, containers and unikernels. This paper’s main contribution is a novel architecture for FPGA virtualization with support for resources overcommitment, NFV management and orchestration. A performance analysis of the accelerators context switch mechanism is included to prove the feasibility of the proposed approach.


Network Functions Virtualization (NFV) is today the important trend in the networking industry and academia which aims to replace current telecom network functions based on specialized hardware components, with Virtual Network Functions (VNFs) implemented as virtualized entities running on general purpose servers. These virtualized entities are usually Virtual Machines running on top of a hypervisor such as XEN or KVM.

However, recently more lightweight virtualization techniques such as containers and unikernels have become alternatives to traditional hypervisors, especially with the microservice design approach which advocates to split complex applications into a set of small/simple interconnected services.

Such modularity concept is revolutionizing the way in which software is designed, built and deployed. Each service can be developed, deployed and scaled independently, making the software faster to implement and easier to understand/maintain.

In addition development costs are lower because of the possibility to reuse existing components in different services. The reduction of telecom operators’ Capital and Operational Expenditures (CAPEX and OPEX) is in fact one of the principal objectives of NFV.

Nevertheless, before really putting this in place, the key requirement that researchers and industry have to address is performance. Moving VNFs from specialized ad-hoc designed hardware to general purpose virtualized servers has in fact big advantages from the point of view of maintainability and flexibility, but presents unprecedented challenges for the CPUs which are not able to cope with telecom operators needs.

Hardware accelerators are today the answer to solve this issue, and are considered an important part of the NFV Infrastructure. Their integration in NFV is defined by the NFV working group in the Interfaces and Architecture ETSI GS NFV-IFA 001 document where accelerators lifecycle and operations are specified (life-cycle management, feature discovery and fault tolerance, etc.). The open source community is going in the direction of implementing these specifications through the OpenStack Cyborg project.

General Purpose GPUs, DSPs and Networking Processing Units (NPUs) are therefore considered key components to achieve the bandwidth and the latency required by the next generation telecom platform. At the same time, FPGAs have characteristics that suits very well the concepts of NFV and are gaining traction by the recent market moves of Amazon, Intel and Xilinx, the former providing FPGA cloud support with EC2 F1, the second acquiring Altera and the latter launching on the market products combining ARMv8 processors and FPGAs, i.e., the UltraScale+ MPSoC. Also Microsoft is going in the same direction, interconnecting FPGAs in its Azure product to build hardware microservices.

FPGAs are providing the best trade off between programmability, reconfigurability, power consumption and performance, although they present today some disadvantages related to portability and lack of support for virtualization and orchestration. To address these unresolved points we designed vFPGAmanager, an FPGA virtualization hardware and software solution aiming to enable FPGA acceleration to VNFs in a portable and orchestrated way.

This paper’s main contribution is a novel architecture for FPGA virtualization with support for resources overcommitment and NFV management & orchestration. We include a performance analysis of the accelerators context switch mechanism to prove the feasibility of the proposed approach.

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